Installation instructions and a list of the Release Notes and Known Issues in System Generator for DSP 2012.3 tools are included in this answer record. A successful installation of Vivado Design Suite 2012.3 changes your design tools version number to 2012.3 (verify by running xlVersion, or typing 'ver' at the MATLAB prompt).
Release Notes and New Features in System Generator for DSP 2012.3
For a list and description of the new features and Release Notes in the 2012.3 tools, see the Xilinx Design Tools Release Notes Guide (UG631).
Please be sure to read the documentation because it answers questions that you might have about changes to the functionality or the look-and-feel from previous versions of System Generator for DSP. The System Generator User Guide is accessible in PDF format at:
For System Generator for DSP Release Notes for other versions, see (Xilinx Answer 29595).
Which versions of System Generator for DSP and AccelDSP synthesis tool are compatible with which versions of ISE software and MATLAB? See (Xilinx Answer 17966).
(Xilinx Answer 47631) - When the System Generator design is "generated" from the Vivado tool, the System Generator token is in hidden mode; cannot correct errors in System Generator token in hidden mode. Why?
(Xilinx Answer 47623) - Why do I get critical Warnings on Pin locs (and constraints not applied) for a model in a design with multiple, unique System Generator submodules?
(Xilinx Answer 47622) - Xilinx BlockAdd feature in Vivado System Generator shows unsupported blocks.
(Xilinx Answer 47623) - Vivado DSP Tools (System Generator for DSP) (2012.1) - Why do I get critical warnings on pin locations (and constraints not applied) for a model in a design with multiple unique SysGen submodules?
(Xilinx Answer 51754) - 14.2 SysGen - Cannot select 'Expose clock ports' for Multirate Implementation