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AR# 53982

14.4 EDK - Zynq-7000 AP SoC QSPI drivers write to reserved bit 26 in Linear Controller

Description


In the versions of Xilinx SDK previous to 14.4/2012.4, the file ISE_DS\EDK\sw\XilinxProcessorIPLib\drivers\qspips_v2_00a\src\xqspips_hw.h incorrectly writes to a reserved bit (26) in the Linear QSPI configuration register.

The line below needs to be changed:

#define XQSPIPS_LQSPI_CR_RST_STATE 0x8400016B /**< Default CR value */

Solution


To fix this issue, change the mask to:

#define XQSPIPS_LQSPI_CR_RST_STATE 0x8000016B /**< Default CR value */
AR# 53982
Date Created 01/25/2013
Last Updated 01/25/2013
Status Active
Type General Article
Devices
  • Zynq-7000
  • ??????
Tools
  • EDK - 14
  • ??????