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AR# 54383

Artix-7 FPGA AC701 Evaluation Kit - Interface Test Designs


I am attempting to exercise the interfaces on the Artix-7 FPGA AC701 Evaluation Kit.

What tests can be run to ensure that the interfaces are working correctly?


Artix-7 FPGA AC701 Evaluation Kit Documentation and Example Designs referenced below can be found on the AC701 Support page.

Feature Test Design Notes
-- Configuration Interfaces --
Configuration Mode Switches AC701 User Guide UG952 Table 1-2 has the valid settings. Assuming configuration source is correctly programmed, this can test the mode pins
Configuration USB JTAG Port AC701 BIST (XTP194) See "Program AC701 with BIST Design" section
Configuration QSPI Flash AC701 Restoring Flash Contents (XTP228)
-- Board Feature Interfaces --
Board DDR3 SODIMM AC701 BIST (XTP194) Also tested with the AC701 MIG Example Design (XTP225)
Board PCIe Edge Connector AC701 PCIe Example Design (XTP227)
Board SFP Connector AC701 GTP IBERT Example Design (XTP224) Requires Molex 74765-0904
Board Oscillator (200 MHz, Differential) AC701 BIST (XTP194) The default BIST examples use the socket clock
Board RJ45 - Ethernet AC701 Ethernet Example Design (XTP223)
Board USB Serial UART AC701 BIST (XTP194)
Board Power Monitoring Interface (TI PMBus) (Xilinx Answer 37561) Requires the TI USB Interface Adapter EVM; see (Xilinx Answer 54022)
Board I2C Interface AC701 BIST (XTP194)
Board FMC-HPC Connector XM105 User Guide (UG537) Page 29.  This is the User Guide for the XM105 Mezzanine Debug Card.
This card has DS5, DS6, and DS7, which indicate good power to the board.  Debug strategies will vary depending on the specific mezzanine card being used.
Board XADC Interface
Artix-7 FPGA AC701 Evaluation Kit AMS Targeted Reference Design and 7-Series AMS TRD User Guide (UG960) Requires AMS101 card
-- Transceiver Interfaces --
Transceiver RefCLK (Differential) AC701 GTP IBERT Example Design (XTP224) This is the IBERT Example Design and could be modified to use SMA RefCLK
Transceiver SMA Connectors (Differential) AC701 GTP IBERT Example Design (XTP224)
-- User Specified Interfaces --
User CLK Socket Connector (Single-Ended) AC701 BIST (XTP194) All designs in the BIST use the socket clock source
User SMA CLK Connectors (Differential) none available These are completely user-driven I/O.  A good test would be loop back or monitoring differential I/O on a scope
User SMA Connectors (Differential) none available These are completely user-driver I/O
User LEDs AC701 BIST (XTP194)
User DIP Switches AC701 BIST (XTP194)
User Pushbuttons AC701 BIST (XTP194)
User LCD Display AC701 BIST (XTP194)

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
54355 Virtex-7 FPGA VC709 Connectivity Kit - Board Debug Checklist N/A N/A
43748 Xilinx Boards and Kits - Debug Assistant N/A N/A
AR# 54383
Date Created 02/26/2013
Last Updated 01/20/2014
Status Active
Type General Article
Boards & Kits
  • Artix-7 FPGA AC701 Evaluation Kit