This answer record contains the Release Notes and Known Issues for the HDMI Receiver (Rx) Subsystem and includes the following:
This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2015.1 and forward.
HDMI Receiver (Rx) Subsystem Page:
Supported Devices can be found in the following three locations:
For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado.
This table correlates the core version to the first Vivado design tools release version in which it was included.
|Core Version||Vivado Tools Version|
|v2.0 (Rev. 1)||2016.2|
The table below provides Answer Records for general guidance when using the HDMI Receiver (Rx) Subsystem.
|Article Number||Article Title|
|(Xilinx Answer 67045)||Do the DDC Signals need to be connected if using the HDMI core in DVI only mode without HDCP?|
|(Xilinx Answer 66741)||Do I need to have both the HDCP 1.4 and HDCP 2.2 cores or is HDCP 2.2 a superset of HDMI 1.4?|
Known and Resolved Issues:
The following table provides known issues for the HDMI Receiver (Rx) Subsystem, starting with v1.0, initially released in Vivado 2015.4.
Note: The "Version Found" column lists the version the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
|Article Number||Article Title||Version Found||Version Resolved|
|(Xilinx Answer 67505)||Why do I encounter error "ERROR: [Synth 8-2841] use of undefined macro kCFG_TX_PHY_BUF_RST " during Synthesis?||v2.0|
|(Xilinx Answer 67292)||HDMI RX Subsystem incorrectly detects1080p 16bits bpc video source||v2.0||v2.0 (Rev. 1)|
|(Xilinx Answer 67306)||Why do I get "WARNING: [BD 41-1284] Cannot set parameter SUGGESTED_PRIORITY on port /hdcp14_irq" when validating my design containing an HDMI Receiver Subsystem with HDCP 1.4 is included?||v2.0||N/A|
|(Xilinx Answer 67242)||Why do I get errors from devices using DDC short reads?||v2.0||v2.0 (Rev. 1)|
|(Xilinx Answer 67241)||Why do I see that the start-of-block bit is only being set for the Channel 0-1 pair and not for the other audio pairs?||v2.0||v2.0 (Rev. 1)|
|(Xilinx Answer 67126)||Why does (PG236) Table 4-2: Device and Speed Grade Selections indicate that Kintex-7/Virtex-7 -1 speed grade parts are higher performance?||v2.0||v2.0 (Rev. 1)|
|(Xilinx Answer 66849)||Why do I get a Critical Warning when connecting a YUV 4:2:2 AXI4-Stream input to the HDMI RX or TX Subsystems?||v1.0||N/A|
|(Xilinx Answer 66504)||Why does the output video look incorrect when receiving 720p59/60 and WXGA+ at 10-bits per component (BPC)?||v1.0||N/A|
|(Xilinx Answer 66380)||The License type is set to "Included" but a Purchased license is required to generate output products?||v1.0||N/A|
|07/07/2016||Added (Xilinx Answer 67292) and (Xilinx Answer 67505)|
|06/08/2016||Added v2.0 (Rev. 1) to the Version Table|
|06/02/2016||Added (Xilinx Answer 67306)|
|05/17/2016||Added (Xilinx Answer 67241) and (Xilinx Answer 67242)|
|04/28/2016||Added (Xilinx Answer 67126)|
|04/15/2016||Added (Xilinx Answer 67045)|
|04/06/2016||Added v2.0 to the Version Table, and (Xilinx Answer 66849)|
|03/01/2016||Added (Xilinx Answer 66741)|
|01/28/2016||Added (Xilinx Answer 66504)|
|01/12/2016||Added (Xilinx Answer 66380)|