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AR# 54634

Vivado 2013.1 and Forward - IP Release Notes and Known Issues for LogiCORE Fast Fourier Transform (FFT)

Description

Description
This answer record contains the Release Notes and Known Issues for the LogiCORE Fast Fourier Transform (FFT) and includes the following:
  • General Information
  • Known and Resolved Issues
  • Revision History
This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2013.1 and forward.
Please reference XTP025 - IP Release Notes Guide for past known issue logs and ISE support information.


LogiCORE Fast Fourier Transform Lounge:
http://www.xilinx.com/products/intellectual-property/fft.html

This FFT has superseded all previously released Xilinx FFT cores.

Solution

General Information
 
Supported Devices can be found in the following three locations:
  • LogiCORE ABC Core Product Guide <hyperlink to core docs page>
  • LogiCORE ABC Core IP Page <hyperlink>
  • Open the Vivado software -> IP Catalog, right click on an IP and select "Compatible Families"
For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado.

Version Table
This table correlates the core version to the first Vivado design tools release version in which it was included.
Core Version Vivado Tools Version
v6.0 2013.1
v5.4 2012.4

General Guidance
The table below provides Answer Records for general guidance when using the LogiCORE ABC core.
Article Number Article Title
(Xilinx Answer 12345) LogiCORE ABC core Solution Center
(Xilinx Answer 12346) Debugging the LogiCORE ABC core
(Xilinx Answer 12347) Writing constraints for the ABC core in Vivado


Known and Resolved Issues
The following table provides known issues for the ABC core, starting with v6.0, initially released in Vivado 2013.1.
Note: The "Version Found" column lists the version the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
Article Number Article Title Version Found Version Resolved
(Xilinx Answer 53360) Multiple pause frame requests can result in a corrupted pause quanta being output v5.4 v5.5
(Xilinx Answer 53520) Very Small Runt frames can be incorrectly marked good v5.4 v5.5
(Xilinx Answer 40028) Virtex-6 FPGAs - Meeting GMII and RGMII setup and hold times v5.1 N/A
(Xilinx Answer 35336) Spartan-6 FPGAs - Meeting GMII setup and hold times v5.1 N/A


Revision History:
04/03/2013 - Initial Release
AR# 54634
Date Created 02/28/2013
Last Updated 01/05/2015
Status Active
Type General Article
Devices
  • Artix-7
  • Kintex-7
  • Virtex-7
  • Zynq-7000
Tools
  • Vivado Design Suite
IP
  • Fast Fourier Transform