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AR# 54937

14.2 Virtex-7 (V7) GSR not working correctly with the StartupE2 primative in simulation

Description

When running a simulation for Virtex-7 FPGA and using a StartupE2 block to simulate the global reset behavior of the device, the simulation shows the GSR reset will never assert, causing incorrect simulation results. 


Solution

This is a known issue with the ISE based tool flow as of the 14.2 release. The issue has been repaired as of the 14.3 release.

AR# 54937
Date Created 03/15/2013
Last Updated 03/27/2013
Status Active
Type General Article
Devices
  • Virtex-7
Tools
  • ISE Design Suite - 14.2