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AR# 55015

MIG 7 Series DDR3 - dbg_dqs VIO selection is not connected to mux_rd_rise/fall signals in debug cores

Description

Version Found: MIG 7 Series v1.8
Version Resolved: See (Xilinx Answer 45195)

When generating a MIG 7 Series DDR3/DDR2 core with the Debug Signals enabled, a dbg_dqs VIO port is available to change the byte group for the resultant debug signals. The mux_rd_rise/fall buses are not connected to dbg_dqs and therefore the results seen are always related to DQS byte group 0.

Solution

Currently, dbg_dqs is connected to the cmp_data and rd_data buses as well as the tap counts. It will be added to the mux_rd_rise/fall signals in a future release.

In the meantime, the rd_data bus can be used to analyze the data.

Revision History
03/27/2013 - Initial release

AR# 55015
Date Created 03/20/2013
Last Updated 07/05/2013
Status Active
Type Known Issues
Devices
  • Artix-7
  • Kintex-7
  • Virtex-7
IP
  • MIG 7 Series