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AR# 55026

14.4 SDK - Configure FPGA and Boot Application from MicroBlaze QSPI Flash.



When an application image is large and cannot fit into block RAM, it needs to be saved to nonvolatile memory, a bootloader designed to copy it to DDR memory when the system boots.

SDK includes a bootloader template for BPI flash, but there is no bootloader for QSPI flash. 

This answer record describes the method to store a bitstream and application image to QSPI flash with the Xilinx tools, and includes a reference design to copy the application image from QSPI flash to DDR3 memory and start the application.


Design description

The reference design is created based on a KC705 BSB project with an axi_quad_spi core in standard SPI mode. 

A custom IP and driver is built into it, and the user application drives LED following the setting of the DIP switch.


Design Flow

Generate hardware

The platform is created with the kc705 bsb. 

It has been included in the attachment in the following location:

<design directory>\kc705_qspi_bootload

Export it to SDK to generate xml file.

Generate application

The source files of the bootloader and user_application are included in the reference design in the following location:

<design directory>\src\apps
The driver for custom is also included:
<design directory>\kc705_qspi_bootload\drivers
You will need to set the repository for this driver properly.

The reference design sets it as a relative repository.
  1. Create the BSP with default settings.
  2. Create two empty applications for bootloader and user_application.
  3. Import the source files of bootloader and user_application separately.
SDK should build the two applications automatically, and create their elf images, bootloader.elf and user_application.elf.
Generate a "download.bit" from system.bit and bootloader.elf.

You can create it in SDK or XPS.

In SDK, run "program."

In XPS, add the bootloader.elf as the implement source and run "update bitstream".

Generate application bin image for flash

To program the user_application image to QSPI flash and let bootloader load it to DDR3, you must translate the user_application.elf to a bin file.

Because the vector sections are located in the memory range 0x00000000~0x0000004f  and the other sections are located in DDR3 memory 0xc0000000~0xc7ffffff, there will be a large gap if the elf image is translated to one bin file. 

This issue is describe in (Xilinx Answer 25252)

Instead, translate the elf image to two bin files for vector sections and other sections. 

Bootloader will copy the two parts from QSPI flash to DDR3 separately.

To get the bin image vector_section.bin for vector sections, use the below command in the ISE Command Prompt shell.

mb-objcopy -O binary -j .vectors.reset -j .vectors.sw_exception -j .vectors.interrupt -j .vectors.hw_exception user_application.elf vector_section.bin

To get the bin image rest_section.bin for the other sections, use the below command in Ithe SE Command Prompt shell.

mb-objcopy -O binary -R .vectors.reset -R .vectors.sw_exception -R .vectors.interrupt -R .vectors.hw_exception user_application.elf rest_section.bin


Generate the mcs file to download to qspi flash

With "download.bit" "vector-section.bin" and "rest_section.bin", you can generate an MCS to download to qspi flash with the below command:

promgen -spi -w -p mcs -u 0 download.bit -data_file up b00000 rest_section.bin -data_file up c00000 vector_section.bin

b00000 and c00000 is the offset address of the two bin files in flash.

You can change the two addresses, but you must update them in the bootloader source code.

The attached reference design includes documentation that shows how to update them.

Now, you can download the generated MCS file to QSPI flash in iMPACT.

Make sure pin 5(M0) of SW13 of kc705 is switched to 1. 


Power up the board.

You should get the below message from UART and gpio leds will blink following the setting of DIP switch SW11.











Associated Attachments

Name File Size File Type
project.zip 2 MB ZIP
AR# 55026
Date Created 03/21/2013
Last Updated 12/23/2014
Status Active
Type General Article
  • EDK - 14.4
Boards & Kits
  • Kintex-7 FPGA KC705 Evaluation Kit