If I target a Spartan-6 FPGA LX75T, LX100T, or LX150T and configure the IP to disable scanning in the bottom GT row as directed by (Xilinx Answer 52716), the IP must be upgraded to v3.5 or later.
The starting frame address for the device scan is incorrect.
This issue is observable when the SEM IP detects an error.
The detected error location will be skewed by an offset, resulting in a correction at the wrong frame.
The IP will detect and attempt to correct the same issue repeatedly.
For the scan and correction to operate properly, Soft Error Mitigation IP v3.5 or later must be used.
This issue has been resolved in Soft Error Mitigation v3.5 and an upgrade to v3.5 is required when targeting one of these parts.
Please refer to (Xilinx Answer 52716) for details of limitations when GTP are used in the design.