The Write Context ID event (event 0x0B) of the Performance Monitoring Unit increments a counter only when an instruction that writes to the Context ID register, CONTEXTIDR, is executed.
However, because of this issue, an instruction that reads the Context ID register also updates this counter.
Under the following conditions, the PMU updates the counter when it should not:
Trivial. The erratum affects the accuracy of the Write Context ID event, and its associated PMUEVENT output signal.
Systems that use the CPU Performance Monitor Unit.
|Device Revision(s) Affected:||All. No plan to fix. Refer to (Xilinx Answer 47916) - Zynq-7000 SoC Silicon Revision Differences Answer Record.|
|Third Party Errata:||Arm Errata 795769|