We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 55366

Design Advisory for 7 Series FPGA GTX/GTH/GTP Transceivers: Transceiver Wizard Sets Suboptimal RX Termination Use Modes


The RX termination use modes are covered in the RX Analog Front End section of the 7 Series FPGAs GTX/GTH Transceivers User Guide (UG476) and 7 Series FPGAs GTP Transceivers User Guide (UG482), and the suggested protocols for the various termination use modes are also listed there.

Some of these protocols, the 7 Series FPGAs Transceivers Wizard v2.5 or earlier, in Vivado 2013.1/ISE 14.5 or earlier, may have the termination set suboptimally. 

In addition, some IP were generated with the same suboptimal settings.


Using a suboptimal RX termination may cause poor performance.

This will be fixed in the next release of the 7 Series FPGAs Transceivers Wizard, 2013.2 for Vivado and 14.6 for ISE. 

The recommended termination use modes are in the user guide RX Analog Front End section.

The following section describes the attributes affected, the GT wizard protocols affected, the IP affected, and information on work-arounds.

Attributes affected
RX_CM_SEL, which controls the mode of the RX termination, such as GND, AVTT, programmable, or floating.
RX_CM_TRIM, which controls the programmable voltage level in programmable mode.
GTH includes:

GTP includes:

GTX includes:

See the users guide's RX Analog Front End section for details on the settings to be used for each use mode/protocol.  The RX_CM_SEL[1:0] attribute was set to GND or Floating (01 or 10) when it should have been set to programmable (11) with RM_CM_TRIM[3:0] set to 800 mv (1010).

GTH/GTP Wizard protocols affected
CAUI, CEI11, CPRI, GigE, JESD204, RXAUI, XAUI, XLAUI, Aurora 8b10b multi lane 2-byte, Aurora 8b10b multi lane 4-byte, Aurora 8b10b single lane 2-byte, Aurora 8b10b single lane 4-byte, OC48, OC192, OTL 3 4, and OTU 4

GTX wizard protocol affected
Answer Record Numbers for Affected IP:
Protocol GTH GTP GTX
JESD204 (Xilinx Answer 55857) (Xilinx Answer 55857)
CPRI (Xilinx Answer 55863) (Xilinx Answer 55863)
RXAUI (Xilinx Answer 55840) (Xilinx Answer 55840)
XAUI (Xilinx Answer 55837) (Xilinx Answer 55837)
Aurora 64B/66B (Xilinx Answer 55849)
QSGMII (Xilinx Answer 55841)
GigaBit Ethernet
(Xilinx Answer 55367) (Xilinx Answer 55367)
Where no answer record is listed, the IP is not affected.

Each IP listed above has an answer record describing how to make the recommended attribute changes. 

For the GT wizard templates, the workaround is to set the attribute values in the individual GTHE2_CHANNEL instantiations. 

For GTH Use Mode 3, set:
1. RX_CM_SEL[1:0]  to 2'b11 (programmable)
2. RX_CM_TRIM[3:0]  to 4'b1010 (800 mv)
3. RXDFEAGCTRL.[4:3] to  2'b10

It is possible that some GTH protocols would fall into Use Mode 2.  Set:
1. RX_CM_SEL[1:0]  to 2'b00 (AVTT)
2. RXDFEAGCTRL.[4:3] to  2'b10

For GTP, set:
1. RX_CM_SEL[1:0]  to 2'b11 (programmable)
2. RX_CM_TRIM[3:0]  to 4'b1010 (800 mv)
3. RXLPM_INCM_CFG to 1'b1
4. RXLPM_IPCM_CFG to 1'b0

For Use Mode 2, set:
1. RX_CM_SEL[1:0]  to 2'b00 (AVTT)
2. RXLPM_INCM_CFG to 1'b1
3. RXLPM_IPCM_CFG to 1'b0

For GTX, set:
1. RX_CM_SEL[1:0]  to 2'b11 (programmable)
2. RX_CM_TRIM[2:0]  to 3'b010 (800 mv)
3.PMA_RSV2[4]  to 1'b1 (part of the 800 mv setting)
4. PMA_RSV2[7:6]  to 2'b01
In the example designs the GT instantiations can be found in the core_name_gt.v[hd] file.

Revision History
05/06/2013 - Initial release

Linked Answer Records

Master Answer Records

Child Answer Records

Associated Answer Records

AR# 55366
Date Created 04/03/2013
Last Updated 06/26/2014
Status Active
Type Design Advisory
  • Artix-7
  • Kintex-7
  • Virtex-7
  • Virtex-7 HT
  • 7 Series FPGAs Transceivers Wizard