We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 55412

2013.1 Vivado - Drag and drop placement of SERDES or DDR Cells to BELs in Device Editor does not work


If I attempt to drag and drop a SERDES or DDR cell to BELs in Device Editor, the operation fails.

This worked as expected in Vivado Design Suite 2012.4.

Was this an intentional change? If not, is there a way to fix this issue?


The change was unintentional and is fixed in Vivado Design Suite 2013.2.

To work around the problem, the SERDES or DDR can be placed using a Tcl command in the Tcl console.


   place_cell {serdesGen[0].serdes/ISERDES_NODELAY_inst} {ILOGIC_X0Y186}

AR# 55412
Date 06/17/2013
Status Archive
Type Known Issues
  • Vivado Design Suite - 2013.1
Page Bookmarked