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AR# 55458

Clocking Wizard v3.6 - Incorrect derived clock period in UCF

Description

In the CORE Generator tool, the Clocking Wizard v3.6 can create an incorrect derived clock period in the UCF file that is generated with the core. Note that the UCF states:

"Derived clock periods. These are commented out because they are automatically propogated by the tools. However, if you'd like to use them for module level testing, you can copy them into your module level timing checks"

Solution

The main input period constraint is correct and will be propagated.

If module level testing is required, the dervied clock periods should be corrected before use.

AR# 55458
Date Created 04/09/2013
Last Updated 04/09/2013
Status Active
Type General Article
Devices
  • Virtex-7