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AR# 55855

CORE Generator - ERROR:sim - Can't read file "~/test+1/tmp/blk_mem_gen_v6_3/blk_mem_gen_v6_3_xst_comp.vhd": No such file or directory


When I generate IP core in CORE Generator, I get an error message:

Running synthesis for 'blk_mem_gen_v6_3'
ERROR:sim - Can't read file "/projects/test+1/tmp/blk_mem_gen_v6_3/blk_mem_gen_v6_3_xst_comp.vhd": No such file or directory
ERROR:sim - Failed executing Tcl generator


The directory path for a CORE Generator project must contain only alphanumeric characters (A-Z, a-z, 0-9), dashes (-), periods (.), spaces, and underscores (_).

Removing the character "+" in the example project directory path above will solve the issue.

AR# 55855
Date 06/24/2013
Status Active
Type General Article
  • ISE Design Suite - 13
  • ISE Design Suite - 14
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