We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 56067

Vivado - How can I lock or fix my design pins to what the Vivado implementation has selected?


How do you lock pins to what the placer chose in Vivado?


In the Vivado IDE, you can select all (Ctrl+A) in the I/O Ports tab of the Implemented Design, then right-click and select Fix Ports from the context menu.

In Tcl mode type:

set_property is_loc_fixed true [get_ports]
AR# 56067
Date Created 05/17/2013
Last Updated 05/17/2013
Status Active
Type General Article
  • Vivado Design Suite