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AR# 56588

14.7 CORE Generator - Missing example design & Simulation directories with 64-bit_Initiator/Target_for_PCI_(Virtex-5/7-Series)


When generating the 64-bit_Initiator/Target_for_PCI_(Virtex-5/7-Series) IP in a 32-bit Windows system, CORE Generator does not create a Simulation or Example Design directory as it normally does. 

There is also a hs_err_pid*.log in the directory with the .xco file that contains the following message:

# An unexpected error has been detected by HotSpot Virtual Machine:
#  EXCEPTION_STACK_OVERFLOW (0xc00000fd) at pc=0x0ce2a1c7, pid=9476, tid=10356
# Java VM: Java HotSpot(TM) Client VM (1.5.0_11-b03 mixed mode)
# Problematic frame:
# C  [libisl_iostreams.dll+0x8a1c7]


How do I resolve this issue?


This an issue with CORE Generator that only occurs in the Windows OS on 32-bit machines.

To work around this, please generate the core with a 64-bit version of CORE Generator, or use Linux.
AR# 56588
Date Created 06/26/2013
Last Updated 12/12/2014
Status Active
Type Known Issues
  • ISE Design Suite