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AR# 56631

Virtex-6 Integrated Block Wrapper for PCI Express - Vendor Type Message Routing Information


The Virtex-6 FPGA Integrated Block for PCI Express User Guide (UG671) indicates that the Vendor Defined Messages are presented to the User Application with a footnote stating:

"The TLP is indicated on the cfg_msg* interface and also appears on the m_axis_rx_* interface only if enabled in the GUI."

In the GUI, it does not appear that there is an option to route or not route the Vendor Message TLP to the user and cfg_msg interfaces.

How are these Vendor Defined messages handled in the core?


The Vendor Defined messages should be handled by the user application. 

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34536 Xilinx Solution Center for PCI Express N/A N/A
AR# 56631
Date 10/16/2014
Status Active
Type General Article
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )
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