We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 56681

LogiCORE IP DisplayPort v4.0, Virtex-7 GTH - DisplayPort core will not synthesize correctly in non-project flow


If targeting GTH, the DisplayPort v4.0 core will not synthesize correctly in the non-project flow. 

If a project is opened, then it will synthesize correctly.

The DisplayPort core uses "getProjectDevice" to select whether GTX or GTH is used in the design.

As a result, the script will always default to GTX when there is no project.


This issue will be fixed in the next release of the core.

As a work-around, use the Project flow when implementing the DisplayPort core targeting a GTH transceiver.

For a detailed list of Vivado LogiCORE IP DisplayPort Release Notes and Known Issues, see (Xilinx Answer 54522).

Revision History
7/3/2013 - Initial release

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
54522 LogiCORE IP DisplayPort - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions N/A N/A
AR# 56681
Date Created 07/03/2013
Last Updated 08/26/2014
Status Active
Type General Article
  • DisplayPort