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AR# 56914

2013.2 Hierarchical Design: ERROR: [Synth 8-3438] occurs after defining the OOC

Description

I am receiving the below error after setting a module as OOC and running synthesis. 

ERROR: [Synth 8-3438] module 'board_setup' declared at 'D:/work/eagle_eye_v5/trunk/fpga/board_setup/board_setup/board_setup.runs/synth_1/.Xil/Vivado-65568-/realtime/board_setup_stub.v:7' does not have any parameter 'TCQ' used as named parameter override [D:/work/eagle_eye_v5/trunk/fpga/board_setup/board_setup/board_setup.srcs/sources_1/new/board_setup_top.v:155]

Why does this error occur?

Solution

When you create an OOC on a module, this action sets the lower-level as a top module and runs synthesis on that module without creating I/O buffers.

The run saves the netlist from synthesis and creates a stub file for later use.

The stub file is the lower-level with inputs and outputs and the black-box attribute set.
 
When you run the top-level module again, the bottom-up synthesis inserts the stub file into the flow and compiles the lower-level as a black box.
 

ERROR: [Synth 8-3438] module 'board_setup' declared at 'D:/work/eagle_eye_v5/trunk/fpga/board_setup/board_setup/board_setup.runs/synth_1/.Xil/Vivado-65568-/realtime/board_setup_stub.v:7' does not have any parameter 'TCQ' used as named parameter override [D:/work/eagle_eye_v5/trunk/fpga/board_setup/board_setup/board_setup.srcs/sources_1/new/board_setup_top.v:155]

 
This error is seen if there are some parameters with the lower level module that are referenced in the top level.

However, since parameters are constants, they are implemented and consumed by the tools so the stub file does not have it.

When synthesis is run, it fails because of the mismatch.

This kind of flow must be avoided.

AR# 56914
Date Created 07/29/2013
Last Updated 12/11/2014
Status Active
Type General Article
Devices
  • Artix-7
  • Kintex-7
  • Virtex-7
Tools
  • Vivado Design Suite - 2013.2