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AR# 57021

7 Series, Aurora 64B/66B V 7.3/8.0 - Hot-plug circuit fails to trigger reset when valid characters are not received by the core

Description

With the Aurora 64B66B v 7.3/8.0 core, hot-plug circuit stays in reset since it is being gated by block_sync signal. This answer record provides the fix to ensure proper hot-plug circuit operation.

Solution

To fix this issue, please get GTXRESET_IN signal from <component_name>_wrapper module to <component_name>_cbcc_gtx_6466 module and update the hot-plug counter circuit as shown below.

Before the change:

process(INIT_CLK, reset_cbcc_comb)
begin if(reset_cbcc_comb = '1') then count_for_reset_r <= (others => '0') after DLY; elsif(INIT_CLK'event and INIT_CLK='1') then if(valid_btf_detect_pulse_i = '1') then count_for_reset_r <= (others => '0') after DLY; else count_for_reset_r <= count_for_reset_r + '1'; end if; end if; end process;

After the change:

process(INIT_CLK, GTXRESET_IN)
begin
if(GTXRESET_IN = '1') then
count_for_reset_r <= (others => '0') after DLY;
elsif(INIT_CLK'event and INIT_CLK='1') then
if(valid_btf_detect_pulse_i = '1') then
count_for_reset_r <= (others => '0') after DLY;
else
count_for_reset_r <= count_for_reset_r + '1';
end if;
end if;
end process;

Revision History
09/26/2013 - Initial release

AR# 57021
Date Created 08/07/2013
Last Updated 09/26/2013
Status Active
Type Known Issues
Devices
  • Artix-7
  • Kintex-7
  • Virtex-7
Tools
  • Vivado Design Suite - 2013.2
IP
  • Aurora 64B/66B