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AR# 57045

Design Advisory for Artix-7, Kintex-7 - When CFGBVS is set to VCCO of Bank 0, then Banks 14 and 15 are limited to 3.3V or 2.5V for Configuration

Description

There is an incomplete statement in the 7 Series Configuration User Guide (UG470) in relation to the recommended CFGBVS settings. In v1.6 of the document, it states the following:

"CFGBVS determines the I/O voltage operating range and voltage tolerance for the dedicated configuration bank 0. CFGBVS selects the operating voltage for the dedicated bank 0 at all times in all 7 series devices."

CFGBVS also determines the I/O configuration for dual-purpose I/O in HR Banks 14 and 15 during FPGA configuration. When CFGBVS is connected to VCCO of Bank 0, the VCCO of Bank 0 must be 2.5V or 3.3V, and if I/O in Banks 14 or 15 are used for configuration, then the VCCO for the Banks (14 and 15) must also be 2.5V or 3.3V. When CFGBVS is connected to GND, the VCCO of Bank 0 must be 1.8V, and if I/O in Banks 14 or 15 are used for configuration, then the VCCO for the Banks (14 and 15) must also be 1.8V. Violating this rule will result in configuration failures.

Solution

When the following are all true, Bank 14 and Bank 15 I/O use the high-voltage mode:

  • Targeting Artix-7 or Kintex-7 devices (where Banks 14 and 15 are HR I/O Banks)
  • Before and during configuration
  • CFGBVS = VCCO of Bank 0

 

Banks 14 and 15, when used for configuration, must be supplied with VCCO = 2.5V or 3.3V, matching the voltage on VCCO of Bank 0.

The recommended setup for 1.8V configuration interfaces is:

  • CFGBVS = GND
  • VCCO of Bank 0 = 1.8V (with 1.8V signaling for whatever is connected to Bank 0);
  • VCCO of Bank 14/15 = 1.8V (when used during configuration)

 

Note that CFGBVS does not apply to the Virtex-7 HT devices, where bank 0 is an HP bank.

See the following tables for examples. These tables will be added to the 7 Series Configuration User Guide (UG470).

Table 1: Artix-7 and Kintex-7 FPGA Configuration Mode, Compatible Voltages, and CFGBVS Connection

Configuration Mode

Configuration Interface I/O Voltage(1)

Bank 0 (HR) VCCO_0

Bank 14 (HR) VCCO_14

Bank 15 (HR) VCCO_15

CFGBVS

JTAG only
(uses bank 0)

2.5V/3.3V

2.5V/3.3V

Any

Any

VCCO_0

1.8V

1.8V

Any

Any

GND

Serial, SPI, or SelectMAP
(use banks 0 and 14)

2.5V/3.3V

2.5V/3.3V

2.5V/3.3V

Any

VCCO_0

1.8V

1.8V

1.8V

Any

GND

BPI
(uses banks 0, 14, and 15)

2.5V/3.3V

2.5V/3.3V

2.5V/3.3V

2.5V/3.3V

VCCO_0

1.8V

1.8V

1.8V

1.8V

GND

Note 1: Although a common VCCO voltage is recommended across all banks used in configuration,
2.5V and 3.3V signaling can be mixed.


Table 2: Virtex-7 T and XT FPGA Configuration Mode, Compatible Voltages, and CFGBVS Connection

Configuration Mode

Configuration Interface I/O Voltage

Bank 0 (HR) VCCO_0

Bank 14 (HP) VCCO_14

Bank 15 (HP) VCCO_15

CFGBVS

JTAG only
(uses bank 0)

2.5V/3.3V

2.5V/3.3V

<=1.8V

<=1.8V

VCCO_0

1.8V

1.8V

<=1.8V

<=1.8V

GND

Serial, SPI, or SelectMAP
(use banks 0 and 14)

1.8V

1.8V

1.8V

<=1.8V

GND

BPI
(uses banks 0, 14, and 15)

1.8V

1.8V

1.8V

1.8V

GND


Table 3: Virtex-7 HT FPGA Configuration Mode, Compatible Voltages, and CFGBVS Connection

Configuration Mode

Configuration Interface I/O Voltage

Bank 0 (HP) VCCO_0

Bank 14 (HP) VCCO_14

Bank 15 (HP) VCCO_15

CFGBVS

JTAG
(uses bank 0)

1.8V

1.8V

Any

Any

N/A

Serial, SPI, or SelectMAP
(use banks 0 and 14)

1.8V

1.8V

1.8V

Any

N/A

BPI
(uses banks 0, 14, and 15)

1.8V

1.8V

1.8V

1.8V

N/A

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
51456 Design Advisory Master Answer Record for Artix-7 FPGA N/A N/A
42946 Design Advisory Master Answer Record for Kintex-7 FPGA N/A N/A
AR# 57045
Date Created 08/08/2013
Last Updated 09/26/2013
Status Active
Type Design Advisory
Devices
  • Artix-7
  • Kintex-7
  • Virtex-7
  • Virtex-7Q