We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 5705

LogiCORE PCI - Can the top level of hierarchy be modified in a Xilinx PCI design?


General Description:

Can a PCI design be used in a way such that the PCIM_TOP.HDL is not the uppermost level of hierarchy? Can the PCIM_TOP name be changed?


Changing the hierarchy or renaming the top-level instance (pcim_top) in a guided design will cause problems -- the signals in the guide file will not match those found in the design, causing critical signals to not be routed properly.

If the file is not guided, the hierarchy can be changed along with the instance names. It is important to make sure that the constraint paths in the UCF file are also changed to reflect changes made to the hierarchy or the instance names.

Xilinx will not be able to provide support for problems caused by changes made to the instance names or the hierarchy.

AR# 5705
Date Created 08/21/2007
Last Updated 12/15/2012
Status Active
Type General Article