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AR# 57344

MIG Spartan-6 MCB - UG388 missing information on the EDK clock "ui_clk"


When using the EDK MIG Spartan-6 MCB core, there is a clock called "ui_clk".  However, there is no information on the "ui_clk" in UG388 Spartan-6 FPGA Memory Controller.  What is the purpose of this clock?


The "ui_clk is the same as the "mcb_drp_clk" and includes the same requirements that are documented for "mcb_drp_clk" within UG388.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
50642 MIG Virtex-6 and Spartan-6 v3.92 - Release Notes and Known Issues for ISE Design Suite 14.3 N/A N/A
AR# 57344
Date Created 09/03/2013
Last Updated 09/03/2013
Status Active
Type Known Issues
  • Spartan-6
  • MIG Virtex-6 and Spartan-6