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AR# 57396

2013.2 - Vivado AXI IIC will not work and MicroBlaze hangs when reading 1 byte when PAGE_BYTE in xiic_eeprom_example.c is set to 1

Description

My design was migrated from XPS to Vivado, but the Vivado Design does not work.
   
To troubleshoot, I took the Xilinx example "xiic_eeprom_example.c".

This example works with XPS and Vivado.


The example writes and reads 16 bytes.


After changing the PAGE_SIZE value from 16 to 1, the MicroBlaze hangs with the Vivado design. 

In XPS the example also works with PAGE_SIZE value 1.
   

Solution

This issue is due to be fixed in Vivado 2013.3.
AR# 57396
Date Created 09/09/2013
Last Updated 03/30/2015
Status Active
Type General Article
Devices
  • SoC
  • FPGA Device Families
Tools
  • Vivado Design Suite
  • Vivado Design Suite - 2013.2
IP
  • AXI IIC Bus Interface