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AR# 57737

Xilinx HSSIO Solution Center - Design Assistant Debugging Power and Attributes Problems

Description

This answer record offers some basic debugging tips for Attributes and Power.

Note: This answer record is part of the Xilinx HSSIO Solution Center (Xilinx Answer 37181)

The Xilinx HSSIO Solution Center is available to address all questions related to HSSIO. Whether you are starting a new design or troubleshooting a problem, use the HSSIO Solution Center to guide you to the right information.

Solution

Check Attributes and Software Release

When approaching any debug situation, upgrading to the latest software release and checking for any recommended attribute changes can save a lot of time.

There is guidance in (Xilinx Answer 56898) on where to look for this information and how to sign up for alerts.

Clean power supply rails are critical for GTs. If debugging transceiver issues, first verify each of the following:

  1. Each supply voltage is at the right level.
  2. The voltage does not droop under load. It is a good practice to stagger the resets of the transceivers if the design contains a large number of them; this reduces both noise and the instantaneous load.
  3. There is not excessive noise on the supplies. The user guide has the guidelines for noise levels in the Power Supply and Filtering section of the 7 series FPGA Transceivers User Guide or UltraScale Architecture GTH/Y Transceivers User Guide
  4. Supply noise does not increase significantly under load. If the noise does increase under load, a power spectrum analysis can help identify the cause.

 

(Xilinx Answer 66793) provides detailed information on power supply checklist and how to make accurate power supply measurements.


For some 7 Series and UltraScale FPGA designs there is more power being drawn on the GT supplies than XPE would predict; see (Xilinx Answer 56900), (Xilinx Answer 56820), and (Xilinx Answer 58227) for help in that scenario. Also, make sure that the transceiver settings in XPE are correct. The Output voltage setting (usually 850mv or above) is often overlooked. Settings in XPE are a common source of trouble.

Be sure that the power and decoupling guidelines in the "Board Design Guidelines" section of the Transceivers User Guide have been followed.

AR# 57737
Date Created 09/30/2013
Last Updated 04/15/2016
Status Active
Type Solution Center
Devices
  • Artix-7
  • Kintex-7
  • Virtex-7
  • More
  • Kintex UltraScale
  • Virtex UltraScale
  • Less