The correct RX termination use mode for PCIe is "Use Mode 3" in 7 Series FPGAs GTP Transceiver User Guide UG482 which requires the following settings:
RXLPM_INCM_CFG = 1'b1
RXLPM_IPCM_CFG = 1'b0
The 7 series FPGAs Transceivers Wizard v2.6 generated in ISE Design Suite 14.6 incorrectly sets RXLPM_INCM_CFG to 1'b0 in the VHDL wrapper and this should be changed to 1'b1 (it is set correctly when using Verilog).
Also, please note that the Wizard v2.6 in Vivado Design Suite 2013.2 sets it correctly in VHDL.
Note: The above issue is only seen in the wrapper generated by the 7 series FPGAs Transceiver Wizard.
The value is correct in the wrapper generated with the 7 series Integrated Block for PCI Express core, hence no modification is required.