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AR# 57855

Vivado 2013.2, EDK14.6, Zynq-7000 DDRC - Incorrect Data Width for DDR3 MT41J64M16, leading to an incorrect address range


When I select the device part MT41J64M16 In the PS7 DDRC configuration window, the GUI shows an 8 bit data width, which is incorrect.

As a result the address size exported to SDK is twice as large as it should be.

This occurs in both EDK and Vivado Design Suite 2013.2.


EDK 14.6:

Vivado 2013.2:

This is a known issue. 

It is resolved in Vivado Design Suite 2013.3, but not in EDK 14.7.

If you use this device part, please select MT41J64M16 first and select "Custom", then change the data width correctly.

AR# 57855
Date Created 10/08/2013
Last Updated 09/17/2014
Status Active
Type General Article
  • Zynq-7000
  • EDK
  • Vivado Design Suite - 2013.3
  • Processing System 7