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AR# 58162

Design Advisory for Artix-7 FPGA Wire-bond Package Devices - SelectIO prohibits pin list when GTP Transceivers are used


This Design Advisory provides SelectIO usage guidelines when GTP transceivers at line rates over 6 Gb/s are used in the Artix-7 FPGA devices in wire bond packages.


Testing in XC7A100T device FGG676 package specifically has shown that the GTP Transceivers in the Artix-7 FPGA wire bond package can be susceptible to activity on some SelectIO banks.

This answer record contains recommendations for SelectIO usage, and the following guidelines should be followed for wire bond packages only when GTP transceivers are used in the design.

To minimize the impact to GTP performance from SelectIO in an adjacent bank, SelectIO banks 16 and 35 should be avoided for line rates equal to or above 6 Gb/s in the wire bond packages.

If SelectIO banks 16 or 35 must be used, then it is recommended to reduce the number of IOs used in these banks and the following IOs are prohibited:

Bank 16: F17, F18, F20, G15, H14, H15, A17, A18, A19, B17, B19, C17, D16, D18, E16, E18, F15, F19

Bank 35: K8, J8, J6, J5, J4, H9, H8, H7, H6, H4, G9, G8, G7, G6, F8, F7, E6, D6

Revision History
01/23/2014 - Initial release

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
51456 Design Advisory Master Answer Record for Artix-7 FPGA N/A N/A
AR# 58162
Date Created 10/28/2013
Last Updated 01/24/2014
Status Active
Type Design Advisory
  • Artix-7