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AR# 58165

2013.2 FIFO Generator v10.0 - Incorrect constraint on the Asynchronous FIFOs in 2013.1/2013.2.

Description


The FIFO Generator IP (the v10.0 core with independent clock and Asynchronous reset in this case) requires set_max_delay -datapath_only constraints to prevent the core from having inter-bit skew with a gray-code counter for a R/W pointer. 


For successful gray coded FIFO transfer, the launch clock period needs to be used with the set_max_delay -datapath_only constraints.

However constraints generated by the FIFO Generator v10.0 in the XDC file incorrectly use the destination clock period.
 
Here is the constraint mentioned in the generated XDC file:
 
set_max_delay -from [get_cells inst_fifo_gen/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gcx.clkx/rd_pntr_gc_reg[*]] -to [get_cells inst_fifo_gen/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gcx.clkx/gsync_stage[*].wr_stg_inst/Q_reg_reg[*]] -datapath_only [get_property PERIOD $wr_clock]
set_max_delay -from [get_cells inst_fifo_gen/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gcx.clkx/wr_pntr_gc_reg[*]] -to [get_cells inst_fifo_gen/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gcx.clkx/gsync_stage[*].rd_stg_inst/Q_reg_reg[*]] -datapath_only [get_property PERIOD $rd_clock]

Solution

This is a known issue with Vivado 2013.1/2013.2. 


This issue has been fixed in the 2013.3 release.

To work around this issue in Vivado 2013.1/2013.2, manually modify the FIFO's constraints to use the launch clock period.

 
set_max_delay -from [get_cells inst_fifo_gen/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gcx.clkx/rd_pntr_gc_reg[*]] -to [get_cells inst_fifo_gen/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gcx.clkx/gsync_stage[*].wr_stg_inst/Q_reg_reg[*]] -datapath_only [get_property PERIOD $rd_clock]
set_max_delay -from [get_cells inst_fifo_gen/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gcx.clkx/wr_pntr_gc_reg[*]] -to [get_cells inst_fifo_gen/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gcx.clkx/gsync_stage[*].rd_stg_inst/Q_reg_reg[*]] -datapath_only [get_property PERIOD $wr_clock]
 
Note: You will need to unlink the IP to modify the FIFO's XDC.
 
This is done with the following command:
 
set_property IS_MANAGED {0} [get_ips fifo_generator_0]

 

 
AR# 58165
Date Created 10/29/2013
Last Updated 03/03/2015
Status Active
Type General Article
Tools
  • Vivado Design Suite - 2013.1
  • Vivado Design Suite - 2013.2
IP
  • FIFO Generator