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AR# 58172

Design Advisory for MIG 7 Series DDR3/DDR2 - MIG includes incorrect maximum frequencies for 2:1 (half-rate) DDR3/DDR2 controller designs targeting -2 and -1 speed grades; the maximum spec numbers in datasheets are correct

Description

Version Found: All MIG 7 Series prior to 2013.4
Version Resolved: MIG 7 Series released with 2013.4

The MIG 7 series tool includes incorrect maximum frequencies for 2:1 (half-rate) DDR3/DDR2 controller designs targeting -2 and -1 speed grades.

Solution

The MIG 7 series tool includes incorrect max frequency specs for Zynq and Artix -1 and -2 devices.

The values are only incorrect for 2:1 (half-rate) designs. The values selectable in MIG 7 series are:


However, the correct values, which are included in the Artix and Zynq FPGA datasheets, are as follows:


Timing errors will most likely occur when targeting a frequency above the datasheet supported values. The violations will be flop to flop timing errors, but the failing paths will vary.

To work around the timing violations, regenerate the target design according to the datasheet specifications (see the table above). The max values will be updated in the MIG 7 series tool to the correct values in Vivado Design Suite 2013.4.

Revision History
11/6/2013 - Initial release

Linked Answer Records

Master Answer Records

AR# 58172
Date Created 10/29/2013
Last Updated 05/23/2014
Status Active
Type Design Advisory
Devices
  • Artix-7
  • Zynq-7000
IP
  • MIG 7 Series