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AR# 58609

Does Vivado support the concept of virtual pins or virtual IO?


Virtual I/O are inputs and outputs that are defined in the design, but should not be implemented in hardware.

This feature is useful for simulation or generic designs that need to cover multiple configurations.

Does Vivado Design Suite support this concept?


No, currently this is a roadmap item.

There are 2 possible workarounds:

  • Use "synthesis translate_off/on" pragma on the top level ports that need to be made virtual.

  • Alternatively, When inputs need to be selectively tied high or low, use TCL commands to remove the ports and connect them to ground or vcc.

The attached example script can be used to accomplish this.


Associated Attachments

Name File Size File Type
make_virtual_pins.tcl 1 KB TCL
AR# 58609
Date 05/27/2014
Status Active
Type General Article
  • Vivado Design Suite
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