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AR# 58747

JESD204 v5.1 IP - Rx TVALID not correctly asserted under certain conditions

Description

For Subclass 1 operation, JESD204B requires that a SYSREF signal is generated.

A periodic SYSREF is valid, but when all of the following conditions are met, the core does not assert TVALID after correctly synchronizing the link:

  • SYSREF Period equals Multiframe Size
    and
  • Subclass is set to 1
    and
  • RX_BUFFER_DELAY is set to 0
    and
  • SYSREF_ALWAYS is set to 1

Solution

For a Periodic SYSREF signal, the period must be greater than the Multiframe size in use on the link.

If the SYSREF period must match the LMFC period then setting a non-zero value in RX_BUFFER_DELAY will also fix the problem.

Note It is also a requirement of the JESD204 core that the SYSREF period be a multiple of 4 byte clocks, as the core operates on a 4-byte datapath.

Revision History
01/07/2014 - Initial release

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
54480 LogiCORE IP JESD204 - Release Notes and Known Issues for Vivado 2013.1 and newer tools N/A N/A
AR# 58747
Date Created 12/10/2013
Last Updated 08/20/2014
Status Active
Type General Article
Devices
  • Artix-7
  • Kintex-7
  • Zynq-7000
  • Virtex-7
Tools
  • Vivado Design Suite
IP
  • JESD204