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AR# 58877

2013.3 IPI - AXI Datamover "ERROR: [BD 41-237] Bus Interface property ID_​WIDTH does not match between /​processing_​system7_​0/​S_​AXI_​ACP(3) and /​axi_​mem_​intercon_​1/​m00_​couplers/​auto_​pc/​M_​AXI(5)"


I am attempting to validate an IPI block design that contains an AXI Datamover core, but the following error occurs:

ERROR: [BD 41-237] Bus Interface property ID_WIDTH does not match between /processing_system7_0/S_AXI_ACP(3) and /axi_mem_intercon_1/m00_couplers/auto_pc/M_AXI(5)

I do not see a way to change the ID_width for the core.

How can I work around this issue?


This is an issue with the core; when you set the Memory MAP Data Width and Stream Data width to 64-bit, the ID_width is always set to 4 which causes the mismatch when connecting to the Zynq-7000 SoC processing system.

To work around the issue, for now, please use the following tcl script:

set_property -dict [list CONFIG.c_m_axi_mm2s_id_width {0} CONFIG.c_m_axi_s2mm_id_width {0}] [get_bd_cells ldst_0/axi_datamover_0]

While the ID_Width from the AXI Datamover core has a value of 4, it is actually not needed and serves no specific purpose.

A CR has been filed to expose the parameter to the user.

AR# 58877
Date 12/19/2013
Status Active
Type General Article
  • Zynq-7000
  • Vivado Design Suite - 2013.3
  • AXI Datamover
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