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AR# 58987

Zynq-7000 AP SoC ZC706 Evaluation Kit - FMC HPC CC pins not connected to Clock Capable pins

Description

On the ZC706, J37 FMC HPC header, FMC_HPC_LA17_CC_P / _N and FMC_HPC_LA18_CC_P / _N pins are routed to I/O pins, not SRCC nor MRCC pins on Bank 13.

Is this correct?

Solution

FMC_HPC_LA17_CC_P / _N and FMC_HPC_LA18_CC_P / _N should be connected to Clock Capable pins.

This was missed during the PCB review, but should not affect board operation.

For all customer-designed PCBs that use the FMC interface, all CC nets should be connected to Clock Capable pins.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
51899 Zynq-7000 AP SoC ZC706 Evaluation Kit - Known Issues and Release Notes Master Answer Record N/A N/A
AR# 58987
Date Created 01/03/2014
Last Updated 01/09/2014
Status Active
Type General Article
Boards & Kits
  • Zynq-7000 All Programmable SoC ZC706 Evaluation Kit