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When a parity error is detected on the OCM, an interrupt signal will be asserted to processor.
This OddParityEn bit is used to generate a parity error.
Implementation Details
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Design Type
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PS
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SW Type
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Standalone
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CPUs
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Single CPU
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PS Features
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OCM, GIC
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Boards/Tools
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ZC702
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Xilinx Tools Version
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Vivado 2013.4
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Other details
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SW is located on DDR
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Files Provided
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ocm_parity_error_test.c
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SW program
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Name | File Size | File Type |
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ocm_parity_error_test.c | 6 KB | C |
AR# 59107 | |
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Date | 11/13/2017 |
Status | Active |
Type | General Article |
Devices |
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Tools |
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Boards & Kits |
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