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AR# 59184

7 Series FPGAs GTX/GTH Transceivers Wizard v3.1 - EXAMPLE_SIMULATION not passed to gtwizard_0_tx_startup_fsm.v

Description

This answer record covers the EXAMPLE_SIMULATION parameter and the changes required to 7 Series FPGAs Transceivers Wizard v3.1 to correctly enable it.

Solution

EXAMPLE_SIMULATION is a new parameter introduced in Vivado 2013.4 to speed up simulation on the TX and also the RX side by bypassing the DRP-based reset sequence for GTH/GTP RX in simulation. This is to work around the requirement of UNISIM models for simulation, refer to (Xilinx Answer 53779) for GTH and (Xilinx Answer 53561) for GTP. This should be set to '1' only for simulation since the reset logic must be used when implementing the design for real hardware.

However, this parameter value is not passed correctly to the TX reset state machine; please make the following changes as a work-around. This will be fixed in the next version of the Wizard in Vivado Design Suite 2014.1.

  1. Open <component_name>_init.v/vhd file.
  2. For VHDL, add the parameter when tx_startup_fsm component is declared.
    Syntax:
    EXAMPLE_SIMULATION             : integer   := 0;
  3. Overwrite the parameter EXAMPLE_SIMULATION in tx_startup_fsm module instantiation.
    Syntax :
    For Verilog:  .EXAMPLE_SIMULATION  (EXAMPLE_SIMULATION)
    For VHDL : EXAMPLE_SIMULATION => EXAMPLE_SIMULATION
  4. Ensure that EXAMPLE_SIMULATION is set as 1 for simulation.
AR# 59184
Date Created 01/21/2014
Last Updated 02/04/2014
Status Active
Type General Article
Devices
  • Kintex-7
  • Virtex-7
IP
  • 7 Series FPGAs Transceivers Wizard