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AR# 59311: Zynq-7000 AP SoC: NAND Programming/Booting Checklist
Zynq-7000 AP SoC: NAND Programming/Booting Checklist
This is a list of required items, necessary actions, and points to be considered while debugging NAND programming and booting on Zynq-7000 AP SoC.
Before opening a webcase, please collect all of the information below highlighted in Bold.
1. Is the NAND flash and configuration supported by Xilinx?
See (Xilinx Answer 50991) to determine the support category (Supported, Limited Support or Unsupported) Note: Only On-Die ECC (Micron) and 1-bit ECC (Spansion) NAND devices can be used with Zynq-7000 SoC. Zynq NAND flash controller does only provide 1-bit ECC and a single chip select support which means if customer's NAND requires multi-bits of ECC or multiple CS, this NAND cant be used. Micron On-Die ECC NAND which use multi-bits of ECC on chip instead of using ECC bit from controller can provide better ECC support.
Provide the full NAND flash name, the configuration mode and the voltage. If the configuration is not "standard" (muxes, level shifters or other), provide also the board schematics.
2. Are the signals properly connected to the memory device?
Provide a schematic of NAND part and monitor the data signals on the board to verify what kind of words are read.
3. Is Zynq Production Silicon?
- Use XMD to read and report the PS_VERSION from 0xF8007080. See (Xilinx Answer 57038) for Silicon Version Register Values -If it is not a production silicon, check (Xilinx Answer 47916) for the silicon revision differences.
Provide Silicon Version reporting register 0xF8007080
4. Is the JTAG chain operating properly?
Use XMD to try to connect to the CPU.
Provide JTAG chain description (how many devices on the chain, how many zynq, zynq in cascade or independent JTAG, any level shifter in the chain). Report any XMD error.
5. In which phase of booting Zynq is failing? BootROM or FSBL?
There are some issues related to FSBL, first check the following answers
In order to understand this, program an image where FSBL has debug prints enabled. Set the FSBL_DEBUG_INFO FSBL compilation flags. See (Zynq Software Developers Guide) for information on Setting FSBL Compilation Flags.
If some printing comes out on the UART during boot:
Provide a log of the FSBL print out on the UART. FSBL is a user application and can be easily debugged using SDK. Try to do a brief investigation before filing a webcase.
If nothing comes out on the UART during boot, first double check the UART baudrate.
Check if the boot image is put to the first 128MB in NAND, the BootRom only searches a limited address.
Provide the status of INIT_B (high or low or blinking), REBOOT_STATUS and BOOT_MODE registers after the boot failure. Most likely the boot image was not programmed properly (continue to step 5).
6. Are SDK and iMPACT failing to program?
See (Xilinx Answer 56030) for NAND programming known issues and workarounds. If there are multiple devices on the JATG chain, and Zynq is not the first device.
See (Xilinx Answer 56781) for how to debug. For debug purposes the Debug Environmental Variable XIL_CSE_ZYNQ_DISPLAY_UBOOT_MESSAGES can be set to your Windows or Linux machine.
Example of setting a Debug Environmental Variable for Windows:
Example of setting a Debug Environmental Variable for Linux:
setenv XIL_CSE_ZYNQ_DISPLAY_UBOOT_MESSAGES 1
NAND programming from Flash Writer requires DDR. Flash Writer needs a FSBL to initialize the board including DDR.
Be sure the FSBL is the same used in the Boot image
Provide the version of the tool used. Be sure your image was built with the same version of the tool used to program. Provide the boot mode settings used for programming (booting from JTAG or NAND). Provide the log obtained using the XIL_CSE_ZYNQ_DISPLAY_UBOOT_MESSAGES variable.
7. Is it working using u-boot?
Use the u-boot.elf pre-built from the latest released image on the wiki, and follow the CTT guide (UG873) that includes the instructions under "Program QSPI Flash With the Boot Image Using JTAG and U-Boot Command".
The flow above for NAND is similar but u-boot command is different to QSPI.
An example below shows
nand erase 0 0x100000
nand write 0x800 0 0xE1000
Note: The zc702 board does not come with NAND flash so we have not added NAND flash support on zc70x configuration.
If you need this support on existing zc70x configuration, please make the below changes in include/config/zynq_zc70x.h
#define CONFIG_NAND_ZYNQ And then compile the zc70x as $ make zynq_zc70x_config $ make Provide the log of the programming using pre-built u-boot image from the wiki. Specify the u-boot version used.
8. Is the board design to support the NAND frequency used for programming?
Use u-boot and double check the clock settings to verify the NAND clock frequency.
The NAND controller is based on ARM SMC PL353, refer to ARM PrimeCell Static Memory Controller (PL350 series) Technical Reference Manual r2p1 for more timing details.
Check if NAND timing parameters have been set correctly to SMC Timing Calculation.
This setting will reflect to the SMC set_cycles register.
A NAND boot might not work due to an incorrect setting here.
Refer to the NAND device AC Characteristics to input the relevant timing parameters to the CS0 column, the unit is nanoseconds.
The cycles will be calculated based on the operating frequency.
Provide the register settings and the calculation done to verify the NAND clock frequency.
9. Is the Xilinx standalone example working?
NAND examples are provided under the SDK install directory