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AR# 59422

Vivado - all_registers Tcl command returns RAM cells in addition to register cells

Description

When I run the "all_registers" Tcl command it returns RAM cells in addition to register cells. 

For example:

If I open Vivado example design BFT and execute the "all_registers" command in the synthesized design, RAM cells will also be returned with Flip-Flops.

  1. %current_instance egressLoop[0].egressFifo
  2. %[all_registers]


The Cell "egressLoop[0].egressFifo/buffer_fifo/infer_fifo.block_ram_performance.fifo_ram_reg" is a RAM, but it will still be returned.

Is this expected behavior?

Solution

This is an expected behavior.

The Command "all_registers" will return all of the cells whose "IS_SEQUENTIAL" property is "TRUE".

If you only need Flip-flops to be returned, you can use "all_ffs" instead.

AR# 59422
Date Created 02/13/2014
Last Updated 05/12/2014
Status Active
Type General Article
Tools
  • Vivado Design Suite