We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 59433

Vivado IP Integrator - deleted IP still referrenced by bxml file cuases critical warning


It has been observed in Vivado 2013.3 and 2013.4 that after removing some IP from a block diagram,  the IP is still referenced in the .bxml file. 

This can cause critical warnings similar to the following:

[Designutils 20-1280] Could not find module 'design_1_axi_quad_spi_0_0'. The XDC file c:/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_axi_quad_spi_0_0_0/design_1_axi_quad_spi_0_0_board.xdc will not be read for any cell of this module.


The design file is seen from the Sources / Hierarchy view within the block diagram, but the option to remove the IP is grayed out.

Also, the IP is not listed in the Sources / IP Sources view.



In the case which was reported, the IP was locked, preventing the block diagram from re-generating the output products.

There were also other deleted IPs that needed to be removed. This issue is currently being investigated.

Using the "set_msg_config" command can reduce the severity of the critical warning.

If the association of the deleted IPs needs to be removed, then follow the steps below:

Step 1

Run "report_ip_status". There will be several IPs needing upgrade, so select "Upgrade Selected".

A "[Designutils 20-1366]" message will be received indicating that the axi_quad_spi was unable to be reset because it is locked.

Step 2

Right-click on block diagram from Sources / Hierarchy view and select "Reset Output Products".

From here if you try to generate the output products, the following message is received:

CRITICAL WARNING: [BD 41-1336] One or more IPs are locked in this design 'design_1.bd'. This command cannot be run until these IPs are unlocked.

Step 3

Use the following command to find the IPs in the design that are still locked

"foreach x [get_ips] {puts $x; puts [get_property IS_LOCKED $x]}" e.g. "design_1_axi_quad_spi_0_0"

Step 4

Remove all of these IP instances from design_1.bxml:
<File Name="ip/design_1_axi_quad_spi_0_0/design_1_axi_quad_spi_0_0.xci" Type="IP">
<Properties IsEditable="false" IsVisible="true" Timestamp="1392135350" IsTrackable="true"/>
<Library Name="work"/>
<UsedIn Val="SYNTHESIS"/>
<UsedIn Val="SIMULATION"/>

Step 5

Remove all of the generated output product directories for the deleted IP from the following path:


Step 6

Remove design_1.bd from the design by right-clicking on bd file in the Sources / Hierarchy view and select "Remove File from Project".

Step 7

Use the Add Sources button in the Flow Navigator to add design_1.bd back into the design.

Step 8

Right-click on the block diagram from the Sources / Hierarchy view and select "Generate Output Products".

AR# 59433
Date Created 02/14/2014
Last Updated 05/09/2014
Status Active
Type General Article