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AR# 59440

2013.4 Vivado-Placer: [Place 30-365] The following macros could not be placed

Description

I draw a pblock for an entity which contains exactly the number of BRAMs or DSP48E1 slices required for this entity (or slightly more).

When I implement the design, I receive the error message below.

How can I resolve this error?
 
[Place 30-365] The following macros could not be placed:
i_det_freq/g_impl_vidfilt.i_vidfilt/g_bufsum[1].g_ram[1].i_ram/if_multi.gen_brams[9].i_en_cl_dpram/Ram_reg (RAMB18E1)
    The instance has been constrained to an area with the following utilization (BRAM/DSP): 100/-1.#IO
 i_det_freq/g_impl_vidfilt.i_vidfilt/g_bufsum[1].g_ram[4].i_ram/if_multi.gen_brams[11].i_en_cl_dpram/Ram_reg (RAMB18E1)
    The instance has been constrained to an area with the following utilization (BRAM/DSP): 650/-1.#IO
 i_det_freq/g_impl_vidfilt.i_vidfilt/g_bufsum[1].g_ram[4].i_ram/if_multi.gen_brams[12].i_en_cl_dpram/Ram_reg (RAMB18E1)
    The instance has been constrained to an area with the following utilization (BRAM/DSP): 650/-1.#IO
 i_det_freq/g_impl_vidfilt.i_vidfilt/g_bufsum[1].g_ram[4].i_ram/if_multi.gen_brams[1].i_en_cl_dpram/Ram_reg (RAMB18E1)
    The instance has been constrained to an area with the following utilization (BRAM/DSP): 650/-1.#IO
 i_det_freq/g_impl_vidfilt.i_vidfilt/g_bufsum[1].g_ram[4].i_ram/if_multi.gen_brams[2].i_en_cl_dpram/Ram_reg (RAMB18E1)
    The instance has been constrained to an area with the following utilization (BRAM/DSP): 650/-1.#IO
 i_det_freq/g_impl_vidfilt.i_vidfilt/g_bufsum[1].g_ram[4].i_ram/if_multi.gen_brams[3].i_en_cl_dpram/Ram_reg (RAMB18E1)
    The instance has been constrained to an area with the following utilization (BRAM/DSP): 650/-1.#IO
 i_det_freq/g_impl_vidfilt.i_vidfilt/g_bufsum[1].g_ram[4].i_ram/if_multi.gen_brams[4].i_en_cl_dpram/Ram_reg (RAMB18E1)
    The instance has been constrained to an area with the following utilization (BRAM/DSP): 650/-1.#IO
 i_det_freq/g_impl_vidfilt.i_vidfilt/g_bufsum[1].g_ram[4].i_ram/if_multi.gen_brams[5].i_en_cl_dpram/Ram_reg (RAMB18E1)
    The instance has been constrained to an area with the following utilization (BRAM/DSP): 650/-1.#IO
 i_det_freq/g_impl_vidfilt.i_vidfilt/g_bufsum[1].g_ram[4].i_ram/if_multi.gen_brams[6].i_en_cl_dpram/Ram_reg (RAMB18E1)
    The instance has been constrained to an area with the following utilization (BRAM/DSP): 650/-1.#IO
 i_det_freq/g_impl_vidfilt.i_vidfilt/g_bufsum[1].g_ram[4].i_ram/if_multi.gen_brams[7].i_en_cl_dpram/Ram_reg (RAMB18E1)
    The instance has been constrained to an area with the following utilization (BRAM/DSP): 650/-1.#IO
 i_det_freq/g_impl_vidfilt.i_vidfilt/g_bufsum[1].g_ram[4].i_ram/if_multi.gen_brams[8].i_en_cl_dpram/Ram_reg (RAMB18E1)
    The instance has been constrained to an area with the following utilization (BRAM/DSP): 650/-1.#IO
 and i_det_freq/g_impl_vidfilt.i_vidfilt/g_bufsum[1].g_ram[4].i_ram/if_multi.gen_brams[9].i_en_cl_dpram/Ram_reg (RAMB18E1)
    The instance has been constrained to an area with the following utilization (BRAM/DSP): 650/-1.#IO
The total BRAM utilization is 40.68 and the total DSP utilization is 39.46
A possible reason is high utilization of BRAMs, DSPs or RPMs. Please check user constraints to make sure design is not over-utilized in the constraint areas (if any)
 

Solution

In this case, the pblock in error is inside a parent pblock which has the EXCLUDE_PLACEMENT attribute set on it.

After setting the property EXCLUDE_PLACEMENT to 1 on the child pblock, the design implements successfully. 

AR# 59440
Date Created 02/16/2014
Last Updated 03/23/2015
Status Active
Type General Article
Devices
  • FPGA Device Families
Tools
  • Vivado Design Suite - 2013.4