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AR# 59568

2014.1 - Vivado IP Integrator - How to handle ELF/BMM when using an IPI design added as a DCP in Vivado

Description

This Answer record describes the flow of how handle the ELF and BMM files in a Vivado project containing an IPI sub module added as a DCP (Design Check Point).

 

Note: For information on how to handle this flow with a Netlist/EDIF sub module, please see (Xilinx Answer 53064).

Solution

Please follow the steps below.

  1. Add the ELF and the BMM files as sources to the project.

       In Project Mode:

       ar59568_layout.png

         In Non-Project Mode, the respective TCL commands are as follows:      

         # Add in ELF and BMM Files
        add_files -norecurse test.elf
        add_files -norecurse design_1.bmm
 

 2.    Associate the ELF file.

        In Project Mode:

        ar59568_elf_prop.png

          In Non-Project Mode, the respective TCL commands are seen below:  

          #Associate the ELF files
         set_property MEMDATA.ADDR_MAP_CELLS {design_1_i/microblaze_0} [get_files test.elf]

 3.     Point to the respective hierarchy in the BMM file. This will ensure that the back-annotated (_bd) BMM file is created and placed in the impl_x folder.

         In Project Mode:
 
         ar59568_bmm_prop.png
 
           In Non-Project Mode, the respective TCL commands are seen below:  
 
           # Point to the respective hierarchy in the BMM file
           set_property SCOPED_TO_REF {design_1_i} [get_files design_1.bmm]
   

 4.      Implement the Project:
          In Project Mode:

          ar59568_impl.png
            This will synthesize, and implement the design

           In Non-Project Mode, the respective TCL commands are seen below:  
 
          # Synthesize and Implement
         synth_design -top design_1_wrapper -part xc7k325tffg900-2
    opt_design
    place_design
    route_design
 
 5.      Verify that the BRAM was initialized.
         
          In Project Mode, we can open the BRAM instances and check the properties to verify that the BRAM's are initialized:
          To do this, open the implemented design:
 
          ar59568_open_impl.png
           Search for the first BRAM instance used in the Back-Annotated (_bd) BMM file. For example:
 
           ar59568_bmm.png
            Now, in the implemented design, search (Ctrl + f) for this BRAM:
 
            ar59568_find_bram.png

 

              Highlighted the found BRAM and in the cell properties, the INIT_xx should be populated with the information from the ELF file:

              ar59568_bram_cell.png

                  In Non-Project Mode, the respective TCL commands are seen below: 

                 #Verify the INIT_xx was correctly initialized with ELF data
                 get_property INIT_00 [get_cells {PATH TO BRAM INSTANCE}]

 

Note: If either the back-annotated BMM file was not generated, or the INIT_xx was not populated,  then please revisit steps 3 and 4 respectively and verify that the hierarchy is correct and that the names are correct.

 



AR# 59568
Date Created 02/27/2014
Last Updated 05/30/2014
Status Active
Type General Article
Devices
  • Zynq-7000
  • Artix-7
  • Artix-7Q
  • More
  • Kintex-7
  • Kintex-7Q
  • Virtex-7
  • Virtex-7Q
  • Less
Tools
  • Vivado Design Suite - 2013.4