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AR# 59572

Design Advisory for Spartan-3AN FPGA in-system flash change and programming solution updates

Description

XCN14003 (http://www.xilinx.com/support/documentation/customer_notices/xcn14003.pdf) is a product change notification that includes the change of the in-system flash within the Spartan-3AN devices.

Xilinx programming solution updates for the XC3S50AN-TQ(G)144 are required to avoid programming failures.

Xilinx ISE iMPACT programming solutions are compatible with all other devices affected by the XCN14003.

Third-party programmer algorithm updates or setting changes may be required for all Spartan-3AN devices affected by the XCN14003.

Custom programming implementations for all Spartan-3AN devices affected by the XCN14003 should be evaluated to determine if the changes shown in Table 3 and Table 4 affect them.

Affected Devices:

For most Spartan-3AN devices, the new in-system flash is backward-compatible with the old in-system flash and it's original programming solutions. 

The exceptions include:

  • XC3S50AN-TQ(G)144 device:  In-system flash density change.
  • XC3S700AN-FG(G)484 device:  Maximum erase time change.
  • All Spartan-3AN devices affected by XCN14003:  Extended device information change and status register read change.

 

See Table 1 for a list of Spartan-3AN devices and the impact of the in-system flash change.

Table 1 Spartan-3AN Devices and Impact of In-System Flash Change on Programming Solutions.

Device

Package

Programming Solution Impact of XCN14003

Additional Information

XC3S50AN

TQ(G)144

UPDATE REQUIRED

New in-system flash has differences from the original in-system flash.

Programming solution updates are required.

See XC3S50AN-TQ(G)144 Change Details, below.

XC3S50AN

FT(G)256

Not affected

NOT AFFECTED See PDN XCN13016 (http://www.xilinx.com/support/documentation/customer_notices/xcn13016.pdf).

XC3S200AN

FT(G)256

Potential impact for a small number of applications

For most applications, the new in-system flash is backward-compatible with old in-system flash and its original programming solutions. However, see the Extended Device Information Change Details section for differences in the number of extended device information bytes.
See the Status Register Read Change Details section below for differences in the status register bytes for continuous read of the status register byte(s).

XC3S400AN

FT(G)256

FG(G)400

Potential impact for a small number of applications
For most applications, the new in-system flash is backward-compatible with old in-system flash and its original programming solutions. However, see the Extended Device Information Change Details section for differences in the number of extended device information bytes.
See the Status Register Read Change Details section below for differences in the status register bytes for continuous read of the status register byte(s).

XC3S700AN

FG(G)484

Potential impact for a small number of applications.
For most applications, the new in-system flash is backward-compatible with old in-system flash and its original programming solutions.  See the Checklist for XC3S700AN-FG(G)484 FPGA Designs and Programming Solutions section to evaluate the impact of differences between the old and new in-system flash. Also, see the Extended Device Information Change Details section for differences in the number of extended device information bytes.
See the Status Register Read Change Details section below for differences in the status register bytes for continuous read of the status register byte(s).

XC3S1400AN

FG(G)484

Not affected

Not affected. See PDN XCN13016  (http://www.xilinx.com/support/documentation/customer_notices/xcn13016.pdf).

XC3S1400AN

FG(G)676

Potential impact for a small number of applications
For most applications, the new in-system flash is backward-compatible with old in-system flash and its original programming solutions. However, see the Extended Device Information Change Details section for differences in the number of extended device information bytes.
See the Status Register Read Change Details section below for differences in the status register bytes for continuous read of the status register byte(s).

XC3S50AN-TQ(G)144 Change Details:

The XC3S50AN-TQ(G)144 in-system flash changes from a 1 Mb density to a 2 Mb density.

Xilinx tools and programming solutions support programming and data file generation for the first 1 Mb only to keep compatibility with both new and original devices.

The new in-system flash supports the same commands and has the same page sizes as the original in-system flash. Thus, the new in-system flash is compatible with the operations and functions of the original in-system flash for the first 1 Mb of its memory array. 

However, the new in-system flash has a few differences shown in Table 2 that can cause original programming solutions or FPGA designs to fail to identify the in-system flash. 

See Table 2 for the highlighted differences and use the checklist below to identify applications that are impacted by the differences.

Table 2 In-System Flash Changes for the XC3S50AN-TQ(G)144

In-System Flash Command

Old In-System Flash Attribute

New In-System Flash Attribute

Description

N/A

Density=1 Mb(1)

Density=2 Mb(1)

The in-system flash density is different.

9Fh Information Read

Byte #2 = 22h

Byte #2 = 23h

The in-system flash Device ID/density code (byte #2 of the 3-byte value from the Information Read command) is different.

D7h - Status Register Read

or 57h (legacy code)

Byte #1, bits[5:2] =0011b

Byte #1, bits[5:2] =0101b

The in-system flash status register density code within byte #1, bits[5:2] are different.
Also, see the Status Register Read Change Details section below for differences in the status register bytes for continuous read of the status register byte(s).

Notes:

The term Mb* in the table refers to a different number of bits depending on whether the device is set with 256 bytes per page or 264 bytes per page. For devices set with 256 bytes/page, Mb* in the table refers to 1,048,576 (2^20) bits. For devices set with 264 bytes/page, Mb* is 1,081,344 bits. This definition of Mb* applies throughout this document.

 

XC3S50AN-TQ(G)144 Programming Solution Algorithm Updates - REQUIRED:

The changes to the in-system flash require updates to all programming solutions. See the list of available Programming Solution Updates below.

Most programming solutions check the Device ID. This Device ID check can cause programming solutions to fail with the new XC3S50AN-TQ(G)144 devices.

 

Checklist for XC3S50AN-TQ(G)144 FPGA Designs and Programming Solutions

- Design Checks

  • Check whether the FPGA design uses the SPI_ACCESS primitive to access the in-system flash.
    If the design uses the SPI_ACCESS primitive, check whether the design sends any of the commands listed in Table 2 above to determine whether a design change is required.

- Programming Solution Checks:

  • Check for use of ISE iMPACT for programming. A patch is required. Otherwise, an incompatible version of iMPACT can fail to program and reports the following error message:
    INFO:iMPACT - SPI Device not found.
  • Check manufacturing flows for device programming. An algorithm update is required for device programmers.
  • Check board automated test or boundary-scan test flows for in-system device programming.  SVF/STAPL files must be regenerated using iMPACT with a patch.
  • Check for in-system programming or remote update implementations. SVF/XSVF/STAPL files must be regenerated using iMPACT with a patch.
  •  

    Additional Information:

    The XC3S50AN-TQ(G)144 FPGA JTAG IDCODE is the same for the original XC3S50AN-TQ(G)144 devices and new XCN14003 XC3S50AN-TQ(G)144 devices.

    There is no top-mark that distinguishes the original XC3S50AN-TQ(G)144 devices and new XCN14003 XC3S50AN-TQ(G)144 devices.

    Only the internal flash device ID or density code distinguishes the original XC3S50AN-TQ(G)144 devices and new XCN14003 XC3S50AN-TQ(G)144 devices.

     

    References:

    Details of the XC3S50AN-TQ(G)144 in-system flash can be found in UG333.

 


 

XC3S700AN-FG(G)484 Change Details:

The XCN14003 revision of the XC3S700AN-FG(G)484 has increases in its maximum allowed page erase time (TPE, max) and maximum allowed buffer to page program with built-in erase time (TPEP, max).  See Table 3, below.

Table 3 In-System Flash Changes for the XC3S700AN-FG(G)484

Symbol In-System Flash Command Description Old
Max Time
New
Max Time
TPE 81h Page Erase, or
0x3D + 0x2A + 0x7F + 0xCF Sector Protection Register Erase
35 ms, Max 50 ms, Max
TPEP 83h Buffer (1) to Page Program with Built-in Erase, or
86h Buffer (2) to Page Program with Built-in Erase
35 ms, Max 55 ms, Max


Note: The typical times for the above commands are similar for the old and new revisions of the XC3S700AN-FG(G)484 device and are much shorter (12-15 ms) than the old maximum times. 

In general, the time for these commands does not approach the maximum specified time until a page nears its rated endurance (ISF_PAGE_CYCLES) of 100,000 program/erase cycles.

Thus, most applications of the XC3S700AN-FG(G)484 internal flash are not affected by this increase in the maximum time.

Extended Device Information Change Details

The in-system flash returns several bytes of device identification information for the Information Read (0x9F) command. 

The fourth returned byte specifies the number of optional, additional extended device information (EDI) bytes. 

The difference in the EDI bytes is shown in Table 4.  

Further details for the differences are shown in the Extended Device Information Field section in UG333, and the information applies to all Spartan-3AN devices affected by XCN14003.

 

Table 4 Information Read Command Extended Device Information Field

In-System Flash Revision   Fourth Byte: EDI String Length (hex) Fifth Byte Value (hex)
Old X-FAB ISF EDI 0x00 Not applicable
New UMC ISF EDI 0x01 0x00


Status Register Read Change Details
 
The Status Register in the old X-FAB ISF is a 1-byte register.  See Table 5.
The Status Register in the new UMC ISF is a 2-byte register.  See Table 6.
 
After the ISF receives a Status Register Read (0xD7) command, the ISF outputs the status register byte 1 (Table 5).

If the ISF receives additional CLK cycles with CSB held Low, then the old X-FAB ISF again outputs an updated status register byte 1.

However, for additional CLK cycles following the initial status register byte 1, the new UMC ISF issues the status register byte 2 (Table 6) before it repeats an updated output of the status register bytes 1 and 2.

Thereafter, the ISF repeats the output of its status register byte(s) accordingly.
 
Note: Bit 7 from all status register bytes is always the READY/BUSY# status.
 
For compatibility across old and new ISF, the application will do one of the following when repeatedly polling for updated status:
 
  • For every instance of a status check, restart the status read with a new CSB High-to-Low edge, issue a new Status Register Read command, and read only byte 1.
     
  • If only interested in the READY/BUSY# status, start the status read with a CSB High-to-Low edge, issue a Status Register Read command, and continuously read status bytes from ISF, but check only the Bit 7 READY/BUSY# status (and ignore all other bits in each status byte).
 
Table 5 - Status Register Format, Byte 1
 
Bit
7
6
5 4 3 2
1
0
Name
READY/BUSY#
COMPARE
ISF MEMORY SIZE
SECTOR PROTECT
PAGE SIZE
Description
0 = Busy
1 = Ready
0 = Matches
1 = Different
0011 = 1 Mbit: XC3S50AN (X-FAB ISF)
0101 = 2 Mbit: XC3S50AN (UMC ISF)
0111 = 4 Mbit: XC3S200AN or XC3S400AN
1001 = 8 Mbit: XC3S700AN
1011 = 16 Mbit: XC3S1400AN
0 = Open
1 = Protected
0 = Extended
(Default)
1 = Power-of-2

Table 6 - Status Register Format, Byte 2
 
Bit
7
6
5
4
3
2
1
0
Name
READY/BUSY#
RESERVED
ERASE or
PROGRAM
ERROR
RESERVED
SECTOR LOCKDOWN
ENABLED
PROGRAM
SUSPEND
BUFFER 2
PROGRAM
SUSPEND
BUFFER 1
ERASE
SUSPEND
Description
0 = Busy
1 = Ready
0
0 = Successful
1 = Error
0
0 = Sector lockdown disabled
1 = Sector lockdown enabled
0 = Not suspended
1 = Suspended
0 = Not suspended
1 = Suspended
0 = Not suspended
1 = Suspended
 




Checklist for custom Spartan-3AN FPGA Designs and Programming Solutions

The ISE iMPACT tool and the files that it generates are NOT affected. The ISE iMPACT tool does not use the commands listed in Table 3 or the EDI bytes in Table 4.

The device programmers are NOT affected. The device programmers do not use the commands listed in Table 3 but might check the bytes listed in Table 4.

Check with the third-party programmer vendor for algorithm updates or turn OFF the idcode check while an algorithm update is pending.

Custom programming implementation check:

 

  • Check whether the FPGA design uses the SPI_ACCESS primitive to access the in-system flash.
    If the design uses the SPI_ACCESS primitive, check whether the design sends any of the commands listed in Table 3 or check the bytes listed in Table 4 to determine whether the design is affected.
    If the design is affected, then consider an update of the design to allow for the increased maximum times for the commands in Table 3 or ignore the EDI bytes shown in Table 4, respectively.
    If affected by table 3, the maximum time increase should be considered especially if the application is expected to program/erase a page up to its rated endurance (ISF_PAGE_CYCLES) of 100,000 program/erase cycles.

  • For custom programming implementations (not ISE iMPACT tools, not BPM Microsystems programmer, and not Elnec programmer) check whether the programming implementation uses any of the commands listed in Table 3 or check the bytes listed in Table 4 to determine whether the programming implementation is affected.
    If the programming implementation is affected, then consider an update of the programming implementation to allow for the increased maximum times for the commands in Table 3 or ignore the EDI bytes shown in Table 4, respectively..
    If affected by table 3, the maximum time increase should be considered especially if the programming implementation is expected to program/erase a page up to its rated endurance (ISF_PAGE_CYCLES) of 100,000 program/erase cycles.
     
  • For custom programming implementations (not ISE iMPACT tools, not BPM Microsystems programmer, and not Elnec programmer) check whether the programming implementation continuously reads bytes after issuing a Status Register Read (0xD7) command.
    See the Status Register Read Change Details section (above) for compatibility of the application with the old X-FAB and new UMC ISF.


 

 

Solution

 

Programming Solution Updates:

Third-Party Programmer Algorithm Updates:

 
    • BPM Microsystems programmer algorithm updates:
      • For the XC3S50AN-TQ(G)144, an update is required. Version: 1.1. See http://www.bpmmicro.com/
      • For other Spartan-3AN devices, check with BPM Microsystems for programmer algorithm updates or turn OFF the id code check until algorithm updates are available.
       
    • Elnec programmer algorithm update is required for the XC3S50AN-TQ(G)144. Version: 3.04s/04.2014 (or later). See http://www.elnec.com/sw/pg4uwarc-ondemand.exe
ISE iMPACT Design/Lab Tools Patch for XC3S50AN-TQ(G)144 Devices

An spi.acd patch is available for the ISE iMPACT Design/Lab tools. However, the spi.acd patch works ONLY with the new XCN14003 XC3S50AN-TQ(G)144 devices.  

Note:
See the Alternate ISE iMPACT Design/Lab Tools Solution below for a programming solution that is compatible with both original XC3S50AN-TQ(G)144 devices and new XCN14003 devices.

 

 

The ISE iMPACT Design/Lab Tools patch consists of two parts:

 

- New spi.acd file

 

- Recommended usage procedure

 
 
ISE iMPACT 14.7 patch file for new XCN14003 XC3S50AN-TQ(G)144 devices only: spi.acd 

This spi.acd patch file is applicable to ISE iMPACT versions 12.2 through 14.7.

Recommended installation for the patch:

 

1. Create a directory for the patch.

 

For example, if your installation of the Xilinx ISE Design Tools is located at
C:\Xilinx\14.7\ISE_DS\ISE
And the XILINX environment variable is set to
C:\Xilinx\14.7\ISE_DS\ISE
Then create the C:\Xilinx\14.7\ISE_DS\ISE_XCN14003_patch\data directory path and copy the spi.acd patch file to this directory such that the spi.acd patch file is located at
C:\Xilinx\14.7\ISE_DS\ISE_XCN14003_patch\data\spi.acd 

 

2. set the following environment variable:  set MYXILINX=C:\Xilinx\14.7\ISE_DS\ISE_XCN14003_patch 


 

Check for correct patch installation--You should have: 

 

1. Patch file located at C:\Xilinx\14.7\ISE_DS\ISE_XCN14003_patch\data\spi.acd 

 

2. These environment variables set:   

 

MYXILINX=C:\Xilinx\14.7\ISE_DS\ISE_XCN14003_patch   

 

XILINX=C:\Xilinx\14.7\ISE_DS\ISE (or your ISE installation location, if different than the default installation path)  

 


Note: DO NOT DELETE the original spi.acd file. 

 

The original spi.acd file is required for programming the original XC3S50AN-TQ(G)144 devices. 

 

The original spi.acd file should still be located in the data directory of your ISE installation, e.g. at C:\Xilinx\14.7\ISE_DS\ISE\data\spi.acd

Recommended iMPACT Patch Usage: 

The use of the patch will need to be enabled or disabled via the definition or omission of the MYXILINX environment variable to support programming of new XCN14003 devices or original devices. 

 

One method for switching between iMPACT tool sessions that can program the original XC3S50AN-TQ(G)144 devices or new XCN14003 XC3S50AN-TQ(G)144 devices is as follows: 

 

1. Open a Windows Command Prompt 

 

2. Clear the MYXILINX environment variable (e.g. set MYXILINX=) 

 

3. Start impact.exe 

 

4. Follow the standard iMPACT procedure for programming your XC3S50AN-TQ(G)144 device. 

 

5. If iMPACT fails programming and reports the following message, then continue to step 6 because iMPACT did not recognize the device ID of the new in-system flash:

 

INFO:iMPACT - SPI Device not found. 

 

6. Close impact.exe 

 

7. Set the MYXILINX environment variable to point to the base location of the patch (shown in the patch installation instructions above), e.g. set MYXILINX=C:\Xilinx\14.7\ISE_DS\ISE_XCN14003_patch 

 

8. Start impact.exe

 

9. Follow the standard iMPACT procedure for programming your XC3S50AN-TQ(G)144 device.


Alternate ISE iMPACT Design/Lab Tools Solution for XC3S50AN-TQ(G)144 Devices:  
 
An alternative ISE iMPACT Design/Lab Tools and JTAG cable programming solution is available that is compatible with both original devices and new XCN14003 devices. 
 
Recommended iMPACT Usage for Alternate Solution:  
 
The following recommended alternate iMPACT tool solution flow supports both original devices and new XCN14003 device programming:
  1. Generate an SVF for programming the target XC3S50AN-TQ(G)144 device on your board.
  2. Use the iMPACT SVF File Updates solution (below) to modify the SVF for compatibility with the original and XCN14003 devices.
  3. Execute  the modified SVF file via the iMPACT tool through the JTAG cable to the device on your board to program the device.
 

Not
e: The iMPACT spi.acd patch, which is described above, is NOT needed for this alternate solution.    
 
ISE iMPACT SVF/STAPL/ACE/XSVF File Updates for XC3S50AN-TQ(G)144 Devices
 
 

A modification is required for SVF, STAPL, XSVF, or ACE files that program XC3S50AN-TQ(G)144 devices.

 

A Perl script is provided for making the SVF or STAPL file modification:  xc3s50an_svf_stapl_fix_for_xcn14003.pl

 

The Perl script takes an input SVF or STAPL file and outputs a modified version of the file. The modified version is compatible with both original XC3S50AN-TQ(G)144 devices and new XCN14003 devices. The Perl script simply removes the in-system flash density code checks in the SVF or STAPL file.

 

 

 

Perl Script Usage:

 
  1. Obtain the original SVF or STAPL programming file, or use iMPACT to generate a new SVF file for programming your .bit file into the XC3S50AN-TQ(G)144 device.
  2. Execute the Perl script as follows, providing the input file
 
   perl $0 <inputfile> [<outputfile>]
     or for Xilinx perl users
   xilperl $0 <inputfile> [<outputfile>]
 where\n";                                                               inputfile = Name of input .SVF or .STAPL file.
   outputfile = [Optional] Name of output file.                    
   If not outputfile specified, then uses original root file name
   and adds _xcn14003 to the file name,    
   e.g. original.svf --> original_xcn14003.svf
 

Additional Instructions for XSVF or ACE files:

 

Programming solutions that use XSVF or ACE files must first modify an SVF file using the Perl script described above. Then, the modified SVF must be translated to XSVF or ACE using the SVF2XSVF or SVF2ACE translation tools. 

 

These tools are built into the iMPACT tool and can be executed as an iMPACT batch command via "svf2xsvf" or "svf2ace". Alternatively, stand-alone versions of the SVF2XSVF or SVF2ACE translation tools are available from the files associated with XAPP058 or XAPP424, respectively.

 
Vivado Design Tools:
 
 
Note: The Vivado Design Tools do not support the Spartan-3AN family.
 

Attachments

Associated Attachments

Name File Size File Type
xcn14003_iMPACT_patch.zip 10 KB ZIP
xc3s50an_svf_stapl_fix_for_xcn14003.zip 2 KB ZIP

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
50921 Design Advisory Master Answer Record for Spartan-3AN N/A N/A
AR# 59572
Date Created 02/27/2014
Last Updated 03/31/2015
Status Active
Type Design Advisory
Devices
  • Spartan-3AN
Tools
  • ISE Design Suite - 14.7