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Error: [Drc 23-20] Rule violation (UCIO-1) Unconstrained Logical Port - 6 out of xxx logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined. To allow bitstream creation with unspecified pin locations (not recommended), use set_property SEVERITY {Warning} [get_drc_checks UCIO-1]. Problem ports: xxxxxx.
set_property SEVERITY {Warning} [get_drc_checks UCIO-1]
AR# 59742 | |
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Date | 03/23/2015 |
Status | Active |
Type | General Article |
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