The SMPTE SDI core does not separate out this bit independently.
The fourth word of each four-word EAV and SAV sequence is called the XYZ word.
It has the following format:
In the XYZ word, bit 8 is the field ID bit.
The SDI core only asserts the following signals when the XYZ word is being output on the various video ports such as rx_ds1a:
You can confirm that the XYZ word is present on the video output ports when these signals are asserted.
Here is a Verilog example that would capture the current field:
always @ posedge (rx_usrclk)
field_id <= rx_ds1a;
This captures the field ID bit at the beginning of each line when the EAV occurs. It is recommended to use rx_eav here.
The rx_sav signal can be used instead, but it will not capture it at the beginning of the line.
Alternatively you could capture the F bit from other video component ports, however the rx_ds1a port is the only one of the four video component output ports that is guaranteed to be active in every SDI mode.