We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 60035

2013.4 SDK - software reset not asserted in ps7_init.tcl


ps7_init.tcl indicates that the SLCR_FPGA_RST_CTRL register is not set to 0XFFFFFFFF.
Why is this different to previous versions?


There has been a change in the way the SLCR_FPGA_RST_CTRL register is handled. 

Prior to Vivado 2013.4 this register was toggled, but starting in 2013.4 it is de-asserted. 

The changes are shown below:

Vivado 2013.3
    mask_write 0XF8000240 0xFFFFFFFF 0xFFFFFFFF
    mask_write 0XF8000240 0xFFFFFFFF 0x00000000
Vivado 2013.4
    mask_write 0XF8000240 0xFFFFFFFF 0x00000000
AR# 60035
Date Created 03/31/2014
Last Updated 09/16/2014
Status Active
Type Known Issues
  • Vivado Design Suite - 2013.4