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AR# 60049

Vivado 2014.1 - Vivado Critical Warning [Timing 38-249] in Chipscope design imported from ISE


In designs imported from ISE using the original NGC and XDC files for the chipscope cores, the following Vivado critical warning is reported during implementation with respect to clocks specified in the ICON core in XDC.

[Timing 38-249] Generated clock U_CLK has no logical paths from master clock J_CLK.


This warning message can be safely ignored.
AR# 60049
Date Created 04/01/2014
Last Updated 04/28/2014
Status Active
Type General Article
  • Artix-7
  • Kintex-7
  • Virtex-7