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AR# 60086

2014.1 - HW_Tools - ERROR: [Chipscope 16-215] This design contains the following cells that cannot be upgraded by the Vivado debug core inserter system: xxxxx

Description

When using the Ethernet 1000BASE-X PCS/PMA or SGMII IP example design, the following parameter should be set before synthesizing the design:

"set_param chipscope.error_legacy_black_box 0" 

Failing to do so could result in the following error: 
ERROR: [Chipscope 16-215] This design contains the following cells that cannot be upgraded by the Vivado debug core inserter system: xxxxx

Solution

The current work around is to set the above parameter and then re-synthesize the design and re-insert the current version of the debug cores into the design.

This is a known issue and will be addressed in future versions of the tools.
AR# 60086
Date Created 04/02/2014
Last Updated 04/17/2014
Status Active
Type General Article
Devices
  • FPGA Device Families