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AR# 60181

MIG UltraScale DDR4/DDR3 - Timing violations may occur at higher data rates


Version Found: v5.0
Version Resolved: See (Xilinx Answer 58435)

At the top supported data rates for each speed grade, timing violations may be seen within the MIG UltraScale DDR4/DDR3 cores. 


These timing violations are currently under analysis. 

Improvements will be made continually in the next two releases and will be resolved with the Vivado 2014.3 release.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
58435 DDR4, DDR3, QDRIV, QDRII+, RLDRAM3, LPDDR3 UltraScale and UltraScale+ - IP Release Notes and Known Issues N/A N/A
AR# 60181
Date 09/23/2014
Status Active
Type Known Issues
  • Kintex UltraScale
  • Virtex UltraScale
  • MIG UltraScale
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