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AR# 60322

MIG Ultrascale DDR4 - MIG tool incorrectly allows Internal VREF to be disabled for DDR4 interfaces. Internal VREF is REQUIRED for all DDR4 interfaces.


Version Found: MIG v5.0
Version Resolved: See (Xilinx Answer 58435)

Internal VREF is required for all DDR4 interfaces.  

See the LogiCORE IP UltraScale Architecture-Based FPGAs Memory Interface Solutions Product Guide (PG150) for details.  

However, the MIG tool incorrectly allows the Internal VREF option (located on the FPGA Options screen) to be deselected. 


The MIG tool will correctly force Internal VREF to be enabled in the next release.  

Until then, ensure that all MIG DDR4 interfaces generated have Internal VREF enabled.  

Enabling Internal VREF within the tool ensures that the appropriate XDC constraints are set.  

Note: the dedicated VREF pins in the banks used for DDR4 must be tied to ground with a 500 resistor.

Also, while Internal VREF is required for DDR4, it is optional for DDR3 interfaces.

Revision History:
04/18/2014 - Initial Release

AR# 60322
Date Created 04/17/2014
Last Updated 05/28/2014
Status Active
Type Known Issues
  • Kintex UltraScale
  • Virtex UltraScale
  • MIG UltraScale