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AR# 60473

14.7 EDK-Tools XPS: register limit on pcores created from CIP wizard


What is the maximum number of registers allowed in a custom pcore?

When a pcore (for example an AXI slave) is created using the XPS GUI, one of the screens specifies a maximum of 32 software addressable registers.

Is this correct and if so, how can this be increased?


There is no limit on the number of memory mapped registers in a pcore.

The limit given in the GUI is based on the limit in the underlying IP used - AXI LITE IPIF.

This IP has a decoder that supports a maximum of 32 address decoding.

To increase the number of addresses you will need to make manual changes to the example created from the template by the wizard.

So for example, you will need to work out how the IPIF is used and how to instantiate two of them and wire up the second one.
In summary, there are no hard limits, the limit displayed in the GUI is from the underlying AXI IPIF IP and the way in which the pcore is constructed in the template.
AR# 60473
Date 05/19/2014
Status Active
Type General Article
  • ISE Design Suite - 14
  • ISE Design Suite - 14.7
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